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  1. Embedded Linux

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  1. Genesys 2: RGMII Rx DDR shift

    Asked by escou64,

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    0 answers

  2. PMOD AD1 FPGA bitstream genatation issues

    Asked by amilashanaka,

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    0 answers

  3. Arty-Z7-20 ethernet PHY failure, and build quality issues

    Asked by cogans,

    0 votes
    1 answer

  4. My basys 3 don’t Turn on

    Asked by Vanessa,

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    0 answers

  5. How to apply a phase to form an output sine wave in the Cordic IP block?

    Asked by loser,

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    1 answer

5,448 questions in this forum

  1. subtrack 2 frame

    Asked by hongquan18196,

    0 votes
    1 answer

  2. First question on here.... [Zybo DDR]

    Asked by JF_Stephen,

    0 votes
    1 answer

  3. How to understand -edge option if first edge of generated clock is falling edge?

    Asked by tip.can19,

    0 votes
    3 answers

  4. [Neso Artix 7] How to transmit more than 1 BD in DMA Scatter Gather mode

    Asked by Bui Cuong,

    0 votes
    7 answers

  5. Noise on JB (Arty A7)

    Asked by pablo,

    0 votes
    3 answers

  6. Nexys 4 Ring Oscillator

    Asked by Shahin,

    0 votes
    20 answers

  7. iMPACT Settings For SPI Programming

    Asked by bass2,

    0 votes
    1 answer

  8. Ethernetlite design (LWIP): Whether AXI UART IP is mandatory ?

    Asked by Thausikan,

    0 votes
    4 answers

  9. IP is locked and cannot be customized

    Asked by Bui Cuong,

    0 votes
    2 answers

  10. Cmod S7 Spartan 7 Board Power Consumption

    Asked by bivin,

    0 votes
    2 answers

  11. PS configuration help

    Asked by Newbiee,

    0 votes
    5 answers

  12. Arty7 xemacp undeclared

    Asked by zthom,

    0 votes
    9 answers

  13. Problem with tutorial; Arty - Getting Started with Microblaze Servers

    Asked by mrpackethead,

    0 votes
    1 answer

  14. Implementation of LWIP Echo Server (Axi ETHERNETLITE) without using AXI UARTLITE

    Asked by Thausikan,

    0 votes
    1 answer

  15. JTAG-SMT2 Connection Issue to Xilinx Vivado

    Asked by nicol,

    0 votes
    27 answers

  16. Bysis 3 16 bit multiplier project

    Asked by Samson,

    0 votes
    3 answers

  17. What is the memory part for the Cmod A7-35T ?

    Asked by Juan,

    0 votes
    2 answers

  18. How can I generate the Memory Configuration File in Vivado 2018.2 ?

    Asked by Juan,

    0 votes
    1 answer

  19. Writing on BRAM from PS and reading from PL of ZYBO

    Asked by shahbaz,

    0 votes
    2 answers

  20. Nexys Video DDR3 place errors

    Asked by Robert Finch,

    0 votes
    5 answers

  21. Discrete Fourier Transform V4.0

    Asked by MVS,

    0 votes
    6 answers

  22. LWIP Echo Server Application: KC705

    Asked by Thausikan,

    0 votes
    7 answers

  23. Zedboard DMA Audio Demo problem

    Asked by Brinda,

    0 votes
    1 answer

  24. FIFO external input microblaze output

    Asked by raultricking,

    0 votes
    1 answer

  25. Pynq - Z1 Power regulator not working

    Asked by harosa,

    0 votes
    1 answer
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