FPGA

1,605 questions in this forum

1. SDK Debugger Not Stopping at Main ZYBO

   Asked by swimteam, 10 hours ago

   0 votes
   3 answers
2. How to input entries from cmd or a computational application (or Matlab) to a VHDL file in ISE 14.7?

   Asked by cristian_zanetti, Saturday at 12:27 AM

   • fpga
   • nexys 4
   • console
   • inputs
   0 votes
   3 answers
3. Change ROM COE

   Asked by dcc, Saturday at 05:21 PM

   • data2mem
   • rom
   • coe
   0 votes
   7 answers
4. Arty Z-20 create_project failing in Vivado 2016.4

   Asked by jigish, Yesterday at 12:21 AM

   • arty z-20
   0 votes
   5 answers
5. Pynq Heating Issues

   Asked by omn0mn0m, August 15

   • pynq
   • temperature
   • heat
   0 votes
   4 answers
6. Why switches have been used in this project?

   Asked by muku, Yesterday at 08:57 PM

   0 votes
   1 answer
7. ZYBO Getting Started Tut UART Ouput Is Junk

   Asked by swimteam, Saturday at 09:58 PM

   0 votes
   5 answers
8. Genesys2 Reference Manual

   Asked by zygot, Saturday at 10:21 PM

   0 votes
   0 answers
9. Is it possible to adjust the number of samples acquired and the sample rate of the Nexys 4 DDR ADC?

   Asked by JessPlazas, Friday at 01:54 AM

   • adc
   • nexys 4 ddr
   • sample rate
   • frequency
   0 votes
   7 answers
10. FPGA getting started

    Asked by Mark1000, Thursday at 04:39 PM

    • newbie
    0 votes
    6 answers
11. Cannot Export Hardware w/ GPIO demo (Arty / Ubuntu Linux / Vivado 2016.4)

    Asked by stewart, Thursday at 01:28 AM

    • arty
    • vivado
    • 2016.4
    • ubuntu
    • linux
    • .sysdef
    0 votes
    4 answers
12. CMOD A7 35T Does not boot from SPI flash

    Asked by jpiat, Wednesday at 11:24 PM

    0 votes
    2 answers
13. Creating a Custom IP core using the IP Integrator Tutorial problems

    Asked by FarmerJo, Wednesday at 11:10 AM

    • vivado
    • 2017.2
    • creating a custom ip core
    0 votes
    5 answers
14. PYNQ rev B & rev C

    Asked by desmond, Wednesday at 02:40 AM

    • pynq
    0 votes
    1 answer
15. Ways of connecting 2 Zedboard?

    Asked by gutielo, August 15

    • connection
    • zedboard
    0 votes
    3 answers
16. XADC working without power supply?

    Asked by gutielo, August 5

    • xadc
    • zedboard
    0 votes
    7 answers
17. Retargeting Xilinx ISE Design Suite 13.2 based on a Nexys3 board to a Zybo or Spartan 6

    Asked by fank, August 12

    • pmodsf
    • zybo
    • spartan6
    • zynq
    • flash
    0 votes
    10 answers
18. Least PL logic intensive data gathering

    Asked by StudentAmsterdam, July 10

    • zybo
    • adc
    • interface
    • interrupt
    • zynq
    0 votes
    17 answers
19. Zedboard Zynq 7000 XADC Header

    Asked by Sam Bergami, June 19

    • xadc
    • xadc header
    • zynq 7000
    0 votes
    27 answers
20. Anvyl Ethernet

    Asked by Andy Bradley, August 12

    0 votes
    5 answers
21. Zybo - XADC through Ethernet

    Asked by eddya89, August 13

    0 votes
    1 answer
22. Arty Z7-20 hello world / BSP regeneration

    Asked by jacobfeder, August 5

    • arty
    • uart
    0 votes
    2 answers
23. Spartan-3e Sample Pack Board

    Asked by turboyoda, August 11

    0 votes
    1 answer
24. How to use the ADC of nexys 4 (Artix 7) in VHDL to acquire signals?

    Asked by JessPlazas, August 10

    • nexys 4
    • adc
    • artix 7
    • vhdl
    0 votes
    3 answers
25. Create an IP that can Partly be Controlled with Vivado SDK and Partly be Controlled by a Physical Switch that Does Not Rely on Vivado SDK

    Asked by electronicsdevices, August 1

    0 votes
    37 answers