All Activity

This stream auto-updates     

  1. Today
  2. It does not power on with a non-Windows 10 system. I even moved the jumper for the micro usb. Could the board be defective?
  3. Hello, I'm trying to modify the pcam-5c design for the Zybo board (Vivado 2017.4). The design takes up a lot of logic for debug especially in MIPI_CSI2_Rx.vhd. I tried removing this logic by un-checking the "Debug Module" box of the "MIPI CSI-2 Receiver" core inside the supplied block design. I saved the design and re-run synthesis - which failed with the following message : Re-checking the "Debug Module" box are re-synthesizing didn't solve the problem. The only thing that fixed the problem is copying the \src\bd\system\ip\system_MIPI_CSI_2_RX_0_0 folder from a mirror ( untouched ) design. 2 questions: 1. How did un-checking the "Debug Module" box cause the design to break in such irreversible way? 2. How can I reliably remove the ILA debug logic ?
  4. The messages may need to be sent after RX.c has already been launched. CAN_ReadStatus directly returns the result of the READ STATUS command specified in the MCP25625 Datasheet. It could also be worthwhile to print the result of a CAN_RxStatus call, as it has more information about the status of the chip's read buffers. Thanks, Arthur
  5. The Pmod SD comment is correct, it is normally used to store webpage info. I believe that the maximum Microblaze local memory size is 64 KB. Since the Basys 3 doesn't have additional RAM outside of the FPGA, the entire program needs to be able to fit in block RAM. The 385 KB specified is the size of the program that SDK compiles, without any modifications to the example code or drivers. I'm not certain how big your application will end up being, but you will be able to find out by looking at the compiled ELF's size in the application project's Debug folder. You may need to manually remove some files to make the application smaller, or you may be able to set some linker settings for the compiler to optimize it as much as possible. Thanks, Arthur
  6. Hi kenken, Please look at the attached LV_with_Waveforms_SDK.zip. It contains the following items: - A version of the Digilent Waveforms library I imported into LabVIEW 2015 ("DwfLibrary" folder); - A LabVIEW 2015 test project with contains this library, together with a test VI in which I started adding the functions indicated in the AnalogOut_Pulse.py source code; - The AnalogOut_Pulse.py file; - The WaveForms SDK Reference Manual.pdf manual. To complete your project, you would need to continue to add functions to the Test VI, as indicated by the AnalogOut_Pulse.py source code. You can open the Python source code with any text editor. For extra information on the needed parameters, please follow the WaveForms SDK Reference Manual.pdf. Best Regards! LV_with_Waveforms_SDK.zip
  7. Thank you for pointing out that nowhere does the store page say that the OpenLogger is only supported by Windows. We make statements on the wiki to that effect, but the store page needs to state that as well. I will get the store page updated promptly to state that. To start the returns process, please contact our sales department and we will refund you your purchase.
  8. OK, thanks for the tip, but it only lowers the noise floor but doesn't reduce the distortion. Can you please answer my other questions? Thank you.
  9. Hi @kkubik For 2V input signal the 5V pk2pk range should be used. With 50V range you loose more than 2 bits.
  10. Hello. I have a problem with my Analog Discovery 2, and it's existing since i received it. I wanted to test the device parameters and simply plugged W1 output to 1+ scope input. Twisted 1+ and 1- cables and shorted 1- input to ground. The measured NF is quite ok (but i thought it would be better) - it's around -91dBV. But THD is really high. I'm measuring a CABLE so there should be no distortion and I receive around -70dB dBV THD (so it's around 0,03%). The output waveform is 1kHz sine, amplitude of 2V. I use spectrum analiser with averaging on, I've set the highest range (50V) - using maximum range helped a bit but i'm still not there. The frequency range is 10Hz - 50kHz. Couple of screenshots should picture the problem. Are my settings wrong? Is waveform generator not precise enough? Is the input somehow clipping - if yes, why? Is Analog Discovery 2 simply not capable of measuring THD lower than -70dB? I also marked with light blue circle a lot of artifacts on the spectrum - what's that?! Thanks for the answer and have a nice day.
  11. I have them formatted as FAT32. For some reason, the 'SD.begin(10)' keeps returning false. On another forum I read that this can often be an issue with the speed that the microcontroller is trying to read from the SD card. Their solution was to modify the SD library to read at half speed. I have not tried this yet, but i am still digging around for other potential causes. I do have another datalogger that I can rely on, but one of the features of the WiFire that peaked my interest was the SD card reader. I would really like to get this working.
  12. Update: I have tried a Hello World tutorial through Vivado to SDK, compiled it and it works. My problems must therefor have originated from somewhere in the Vivado block diagram stage. Alistair
  13. 1. Since it is such a simple code, most likely the issue is not with Vivado version but with your project. The best way would be recreating the project in the new version from scratch. 2. When you get positive outcome from someone's post, please, indicate that this is a solution. It would allow others to learn, plus would encourage more help. Thanks!
  14. Hi, I'm trying to use Pmod WiFi on a Zynq board for a school project and it is required to add WiFi feature to the boards so that the mother board can send to the other boards. I built the basic block diagram but I'm not sure whether it works because when I run the template projects from Digilent/vivado-library on github, there is no response at the terminal, nothing happens. Does the board need a SD card for setting up a TCP/UDP echo server/client (there is already a SD card slot on my zynq board)? Also, can someone take a look at my block diagram to make sure it is correct? Thanks, everyone.
  15. Thank you very much Arthur! that solved the problem. And what you said about the memory.. I understood from another qustion that someone asked in this forum that I need an addition PmodSD only if I'm trying to make an HTTPServer project. In my case the board is only a client and the server is on another computer and the board is just sending data through the PmodWIFI. Do I still need the extra memory for that? thanks, Netanel.
  16. Hello! I just bought a Cmod S6 board (see: the board). In the description we see (here the main datasheet of the board): The Cmod S6 implements the Digilent EPP interface (DEPP) for 8-bit parallel data transfers between the FPGA and a computer attached via the USB Micro connector. DEPP is based on a set of APIs available in the Adept 2 public SDK. On this page, you can download the sdk, the adept system and the utilities. Inside the sdk zip file, you can find a description on how to build a solution in Visual C++. The solution depends on your board, so in my case I need to use the DEPP solution. I followed all the steps in the manual: notice that there is a difference between what is written and what I have to do, because the VC++ version that they use is quite old and things have been moved around (in particular: the location in Steps 4 and 5 have been changed but I still manage to found those variables and insert the correct paths). However, when I try to build the solution I get he following error: cannot open file 'depp.lib dmgr.lib' NB: I am on Windows 10. Anyone has any idea of what is going on and how I could solve this problem to then compile the solution? Thank you for your help Cescoz
  17. Hi, I have a ZEDBOARD which I want to interface it to an analog input signal and see the sinusoidal output. i'm following lab 3 tutorial by Adam Taylor. So, as for the first step, I tried to connect the signal generator to Vn and Vp. I expected to see the sinusoidal shape of the voltage in XADC dashboard (XADC wizard demo). and also set the ENABLE_ALL_AUXILIARY_CHANNELS check mark, which will include Vp/Vn. I set the function generator to frq 50Hz and amplitude 400-600 vpp, or DC also I applied and checked the signal on the dashboard and serial oscilloscope both. But, the board produces no reaction and the Vp_Vn channel still gives an uneven sine wave or i guess its noise or something else. I tried so many times but still i'm stuck at this point . Could anyone suggest any solution or PoW ?
  18. Hi, @artvvb Thank you for replying to my post!! The above problem has been resolved, but I have failed to receive CAN messages... I set up a CAN bus, sent traffic logs from the CAN analyzer to PmodCAN, and ran "C: \ Xilinx \ ip \ Pmods \ PmodCAN_v1_0 \ drivers \ PmodCAN_v1_0 \ examples \ RX.c" with Launch on Hardwear However, the following screen is displayed. The sample code Rx.c has not changed anything from the code distributed with git. By the way, the screen which ifconfig command is executed on the PYNQ-Z1 board is as follows. I know that the return value in the CAN_ReadStatus () in Rx.c is not good, and it occurs this result. However, I don't know why the return value of the function is not good. Could you give me advice?
  19. tim1

    Cmod A7 HW Target Shutdown

    ERROR: [Labtoolstcl 44-494] There is no active target available for server at localhost. Targets(s) ", jsn-Cmod A7 - 35T-210328AB77C7A" may be locked by another hw_server. The error I'm reading when I try and program my device
  20. D@n

    Genesys 2 SD card slot

    @DanK, I've been using this code for working with SD Cards recently. So far, I've been successful reading and writing files. While I've used the reset, and while I start the design with the SD card in reset, I'm not quite certain that it actually resets the card like it's supposed to. I had some test failures along the way to getting this working that suggest that the reset didn't truly pull power from the card as well as removing the card from the board did. Dan
  21. Using Windows 10, my Basys 3 Artix-7 FPGA Trainer Board will not power on. Bought a new USB cable from Digilent and the board still did not power on.
  22. DanK

    Genesys 2 SD card slot

    Hello, Does anyone have a working example for using the SD card slot on the Genesys 2? I am trying to use SPI mode and I am not getting a response to CMD0. I just noticed that according to the docs I should be driving "SD_RESET" low to power the card. I am not doing this, but the card still receives power. Is it possible that the PIC24 is still trying to use the SD card slot?
  23. Yesterday
  24. If so, the card itself would be in the read-only mode. How are the SD Cards formatted? I'm pretty sure the sketch can handle FAT16 and FAT32, but exFAT wouldn't be supported.
  1. Load more activity