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  2. Hi @GeorgeMina, Yes the cable like the one you linked will work correctly. I'm not familiar with the Nebula board you linked, but most microcontrollers programming environments are pretty beginner friendly. Let me know if you have any questions about this. Thanks, JColvin
  3. Today
  4. @adambro What value are you passing for the fOverlap parameter of DspiPut? Are you running the same Linux distribution on both Linux PC's and is the architecture the same? What is the architecture: x86, x64, or arm? Thanks, Michael
  5. @DJOConnor XC3S400 is an old device and my guess is that we most likely designed one or more part from the same family onto a Digilent board, tested it, and assumed it would work for all parts in the family and didn't explicitly test programming an XC3S400. We never really intended for djtgcfg to be used as a general purpose FPGA configuration tool... we only intended for it to be used to configure the devices that were on Digilent System boards. Now that ISE and Vivado both include integrated support for our programmers there is no need to add support for new devices, nor is there any motivation to go back and test any of the legacy devices that aren't utilized on active Digilent system boards. If we do another release of djtgcfg then we will likely remove all legacy devices from jtscdvclist.txt so that those devices end up being unrecognized by djtgcfg and then have jtsc spit out a message that says to use iMPACT or Vivado. In the end the solution is to use iMPACT or Vivado, both of which have the programming algorithms built in and tested by Xilinx. Thanks, Michael
  6. Oh nice! Yes, I tried it out and it works. Thank you. FYI: To get it to work reliably at 921.6K I had to drop the Spy Rate to 2X. It looks correct but I am getting "Samples Lost" warnings. My two devices have different line terminators one is CR and the other CR LF. I can only make one global choice, so its a little weird. I'll live with it though, this really helps.
  7. Hi @Wayne.B I wanted to say not, but I just notice that such option is already added Use the UART Spy in the beta version: https://forum.digilentinc.com/topic/8908-waveforms-beta-download/
  8. The protocol options and features in WaveForms are great and do just what I need. The only issue it looks like Waveforms only supports one Protocol window, hence 1 UART. I need to monitor serial communications between two devices, which means I need two RX inputs. Is there a way to achieve this with the latest version?
  9. Hello, We apologize for taking so long to answer this issue. I have followed the steps you mentioned in the first post (of course, using zybo-z7-20 instead of zybo-z7-10) and I managed to get things done. Please be careful to the exported file location (I suggest to use the project default locations). I attach a screen caption with the Vivado block design and a caption with my teminal showing the great message. I am also attaching a zip with my project, in case you fail to get it running you can try to use mine. Please follow the steps from the readme file (run the proj/create_project.tcl script, ...). Good luck. ZyboHello.zip
  10. Thank you very much for your answer. It is true I am reconfiguring it, I moved the code outside the loop. However the reads are done in this loop, so Ishould not miss samples. for(int i=0;i<NUMBER_OF_SAMPLES;i++){ XSysMon_GetStatus(SysMonInstPtr); while ((XSysMon_GetStatus(SysMonInstPtr) & XSM_SR_EOC_MASK) != XSM_SR_EOC_MASK); *(sample+i) = XSysMon_GetAdcData(SysMonInstPtr, XSM_CH_AUX_MIN+channel); } The main problem is that it works for aux_channel 3, like you can see in the capture, but fails in all the other channels. Regards
  11. @bhall Thanks a lot bhall for giving info.I got this elf bootloader working when I started from scratch.
  12. As far as I can tell from your code, you are continuously reinitialize and reconfigure the XSysMon (the XADC driver). During this process, which is redundant, you are loosing a lot of samples. Try this instead: #include <stdio.h> #include "xparameters.h" #include "platform.h" #include "xsysmon.h" #include "xil_printf.h" #include "xstatus.h" #include "xuartlite.h" #define UARTLITE_DEVICE_ID XPAR_UARTLITE_0_DEVICE_ID #define SYSMON_DEVICE_ID XPAR_SYSMON_0_DEVICE_ID #define UART_BUFFER_SIZE 16 #define NUMBER_OF_SAMPLES 4500 int main() { static XSysMon SysMonInst; /* System Monitor driver instance */ unsigned int ReceivedCount = 0; unsigned char RecvBuffer[UART_BUFFER_SIZE]; XUartLite UartLite; unsigned int channel = 3; int Status; XSysMon_Config *ConfigPtr; XSysMon *SysMonInstPtr = &SysMonInst; int *sample; //External memory address to store samples sample=(int *)0x60000000; init_platform(); Status = XUartLite_Initialize(&UartLite, UARTLITE_DEVICE_ID); ReceivedCount = 0; while(ReceivedCount==0){ ReceivedCount = XUartLite_Recv(&UartLite, (unsigned char *) RecvBuffer, 1); } ConfigPtr = XSysMon_LookupConfig(SYSMON_DEVICE_ID); if (ConfigPtr == NULL) { return XST_FAILURE; } XSysMon_CfgInitialize(SysMonInstPtr, ConfigPtr, ConfigPtr->BaseAddress); XSysMon_SetAvg(SysMonInstPtr, XSM_AVG_0_SAMPLES); XSysMon_SetAdcClkDivisor(SysMonInstPtr, 39); XSysMon_SetSequencerMode(SysMonInstPtr, XSM_SEQ_MODE_SINGCHAN); XSysMon_SetCalibEnables(SysMonInstPtr, XSM_CFR1_CAL_PS_GAIN_OFFSET_MASK | XSM_CFR1_CAL_ADC_GAIN_OFFSET_MASK); Status= XSysMon_SetSingleChParams(SysMonInstPtr, XSM_CH_AUX_MIN+channel, FALSE, FALSE, TRUE); if(Status != XST_SUCCESS) { return XST_FAILURE; } /* * Disable all the alarms in the Configuration Register 1. */ XSysMon_SetAlarmEnables(SysMonInstPtr, 0x0); while(1){ /* * Wait till the End of conversion */ //print("Capturing\n\r"); for(int i=0;i<NUMBER_OF_SAMPLES;i++){ XSysMon_GetStatus(SysMonInstPtr); /* Clear the old status */ while ((XSysMon_GetStatus(SysMonInstPtr) & XSM_SR_EOC_MASK) != XSM_SR_EOC_MASK); //Four last bits are noise *(sample+i) = XSysMon_GetAdcData(SysMonInstPtr, XSM_CH_AUX_MIN+channel); } //print("Finish capture\n\r"); //xil_printf("samples=np.array(["); for(int i=0;i<NUMBER_OF_SAMPLES-1;i++){ xil_printf("%d,",*(sample+i)); } xil_printf("%d\r\n",*(sample+NUMBER_OF_SAMPLES-1)); xil_printf("end\n"); } cleanup_platform(); return 0; }
  13. Here you can find a tutorial for nexys4 and microblaze. It is in spanish, but you can enable english subtitles. https://vhdl.es/tutorial-microblaze/
  14. Hi @thoriam In case you are supplying the amplifier with +/- voltages you can connect one of the inputs to GND. In case you are supplying it with + and GND, you can drive one input with a DC voltage using Wavegen Channel 2. The Network Analyzer controls Wavegen Channel 1 to generate stimulus signal and you can specify offset.
  15. I flashed using the elf bootloader with unchecking the convert option,But it is not loading elf.
  16. Yesterday
  17. JColvin

    pmodBLE

    Hi @Ely4, I believe you can use some sort of list command such as some of the ones listed in the RN4871 User Guide, though I will look into this some more. Thanks, JColvin
  18. Hey everyone! I’m curious about what experiences everyone has here using Vivado HLS with a Zynq-based board. Would you share yours? We’re doing this for our company, researching whether to come up with a new, programmer-focused HLS tool for Zynq owners. Driven more like out of curiosity than a particular business case. If you’d like to be kept in the loop add “yes PM” as a message and I’ll get in touch with you via a private message.
  19. @JColvin I wasn't able to use the Add Design Tools or Devices function due to administrator controlled system, but I was able to reinstall from scratch and fixed the issue. Thanks @JColvin and @Bianca!
  20. Hi guys I need to test my amplifier with Network Analyzer in Wavefoms. But my amplifier has differential inputs and third ground pin. How can I test it using Analog Discovery 2?
  21. Hi @emma9513, If that is the case, I would suspect that during the original installation of Vivado that the Zynq chips were not added in. You can add them in by going to the Help tab in Vivado and then selecting "Add Design Tools or Devices". You'll then be asked to log in to your Xilinx account, whereupon afterwards you'll be able to select the Zynq-7000 chips under SoCs in the Devices category. After adding those in and restarting Vivado, you should be able to see those chips and the Cora show up in the board selection screen. Let me know if you have any questions. Thank you, JColvin
  22. None of the boards you listed are shown in the list, even by search. Zynq-7000 is not an option for part family.
  23. Hi @sgrobler and @benl, I was informed today that a conversion process of converting a dlog file into csv is now tested and working for OpenLogger and OpenScope MZ and is documented here: https://reference.digilentinc.com/reference/software/waveforms-live/how-to-convert-dlog. If you have any questions on this, I will try to answer them, but may end up deferring to @AndrewHolzer for the technical side of things. Thanks, JColvin
  24. Also, you added a picture from the default part. It's difficult to find something just by scrolling, so I suggest to find the ZYNQ like this:
  25. It's just the Cora or Other Zynq boards? I'm trying to figure out if it's something from Vivado installation since you said it won't recognize the ZYNQ part. Can you select ZedBoard or Zybo, Zybo Z7, Arty Z7? Are they visible in Vivado?
  26. It still isn't showing up. I should also note that I am using the new board files from the repository, not the old board files. It said if you are using 15.x or above to use new. I a using 2019.1
  27. Please try to put the Cora in board_parts instead of board_files and reopen Vivado. See if it gets recognized. Bianca
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