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  1. Today
  2. JColvin

    Installing Cerebot 32MX4 driver

    Hi @aatm1412, I apologize for the delay. I'm not certain what the issue may be here. With regards to using the device as a USB device (as per the jumper J12) that will attempt to have the module be used as a USB Host/OTG module (using J15) and it will need to be externally powered, which if you are not using an external power source would explain why your computer does not detect the driver. Setting the jumper to USB Debug Port should have the power instead be sourced from the USB port at J11, which may explain why your PC detects the device. What I would try is to set the power to USB Debug Port and when you can see the Microchip WinUSB Device, have your PC uninstall the driver and then re-run the Starter Kit Software to help ensure the correct driver is installed (as opposed to whatever driver Windows 10 decides is appropriate, which may or may not be correct for this older board). I don't physically have the Cerebot 32MX4 for myself to physically test this though, so I can't confirm if this will work or not. Thanks, JColvin
  3. Hi @RAN The AD2 can't really be used in standalone mode. It has no static memory to configure a startup operation, like to generate signal. When USB cable is disconnected, the VBUS drops and this stops the AUX supply through IC48/IC26 A solution would be by powering the AD2 from USB hub, configuring it from software, then disconnecting the PC USB cable. The AD2 powered from HUB will continue the operate, to output the configured, AWG, Pattern Generator signals, including modulation, triggering options... positive/negative power supplies
  4. Piotr Rzeszut

    Analog discovery 2 waveform generator

    No it cannot. You may use a mini computer like Orange pi.
  5. jpeyron

    LWIP Echo Server Application: KC705

    Hi @Thausikan, I haven't been able find any specific reason that you are getting junk data with p->len being larger than 32. I would suggest to reach out to xilinx support about this issue with the LWiP. thank you, Jon
  6. jpeyron

    Zedboard DMA Audio Demo problem

    Hi @Brinda, You want to download the release version of Zedboard DMA project here. I was able to generate a bitstream without issues in vivado 2016.4. Unfortunately, Vivado projects are version specific. This project was made in and works with Vivado 2016.4 without having to make alterations to the project. What version of Vivado are you using? cheers, Jon
  7. Bianca

    Reference Schematic for the Pmod USBUART2

    Hi @MaelXD, Can you please show me a picture with the USBUART2? We were not aware of a second revision of USBUART, neither I could track it on the store and engineering database. Did you purchase it from our store? and when? Thanks, Bianca
  8. Brinda

    Zedboard DMA Audio Demo problem

    i want use Zedboard DMA Audio Demo Project Repository in git is i download & extract it.for make project I used the method described on this page 2. Open the Project 2.1) Within the project folder there will be several subfolders named “hw_handoff”, “proj”, “src”, “repo”, and “sdk”. Go into the “proj” folder, right click the “create_project” file and select Properties. Highlight and copy the file's location. but "proj" folder is Empty & i cannot find “create_project.tcl”
  9. Kabron

    Analog Discover 2 Matlab Error

    @JColvin, I do not understand, your message is a constructive solution or just a general purpose reasoning. Resources you are referring are monthly old while I told of yesterday experiments. And of course I studied them all before testing.
  10. Hey, I'm trying to use a pmod USBUART2, though it seems that the reference documentation for the module has been removed from the Digilent website. Unlike the USBUART, the USBUART2 is a 2x6 pin pmod, and isn't compatible with the current USBUART... Is there anyone who has reference documentation for this pmod? Or is there somewhere where legacy documentation can still be accessed? Thanks, Sam
  11. Hi @jma_1 The "Debug" mode is in the upper right corner of the Protocol window. In case you need DIO lines for other purposes, uncheck the Clock stretching since this option would use by default DIO 0-9 on Analog Discovery.
  12. Yesterday
  13. jpeyron

    FIFO external input microblaze output

    Hi @raultricking, Here is the AXI4-Stream FIFO v4.1 LogiCORE IP Product Guide. The axi4 streaming FIFO ip core has an IP Example design available by right clicking on the IP Core that should be helpful. thank you, Jon
  14. Sorry - what is the 'debug' option? Is this the 'debug' control inside the script window (debug, run, stop, abort)? J -
  15. jpeyron

    Pynq - Z1 Power regulator not working

    Hi @harosa, While using the external power could you use a DMM and measure capacitor voltages : C190 , C191, C192. Have you tried a different external power source? thank you, Jon
  16. JColvin

    Installation Arduino IDE failed

    Hi @Markus, I don't recall if I had this exact issue with the certificates, but I recall having an issue in the past where I wasn't able to get the Digilent Core installed/working properly on my computer either. What I ended up doing (I don't know if it'll be the same solution for you) was uninstalling the Arduino IDE and then also deleting the Arduino15 folder from the local AppData (Users->yourName->AppData->Local). As an additional question, what is your default browser that you are using? I'm personally using Firefox and know other people have downloaded it successfully with Chrome, so if you're using something different, maybe that would cause the File Signature Verification Failed error? I don't know this for certain though. Thanks, JColvin
  17. harosa

    Pynq - Z1 Power regulator not working

    Hey guys, Does anyone know why my power regulator suddenly stopped working? I can power it through usb (jumping the usb pins), but when I try to use the barrel jack, I get no LED's. I just double checked the voltage and i'm just above 12v.
  18. jpeyron

    Discrete Fourier Transform V4.0

    Hi @MVS, I have no experience with the DFT IP Core. I did find some documentation that might help here and here. thank you, Jon
  19. JColvin sources

    Hello, Unfortunately, there are no plans to update the on GitHub. We do have the source code for the firmware available on GitHub though ( if there is somebody who wants to update it. Thanks, JColvin
  20. Hi @armin, What version of Vivado are you using? The project linked above was made in Vivado 2017.2. You should be able to make the project in a different version of vivado by using the two tutorials and the information linked above. cheers, Jon
  21. JColvin

    100 MHz clock synchronization between two AD2

    Hi @darth458, There a number of threads discussing using multiple AD2's available below (each containing some links to more threads): As you'll find, the limitations are what @xc6lx45 noted. Let me know if you have any questions. Thanks, JColvin
  22. JColvin

    Analog discovery 2 waveform generator

    Hi @RAN, Unfortunately, I don't believe that functionality is available for the Analog Discovery 2. Thanks, JColvin
  23. JColvin

    Analog Discover 2 Matlab Error

    Hi @Kabron and @Roman C., There has been a recent update to the MATLAB Data Acquisition Toolbox that now supports the Analog Discovery 2 on both R2018a and R2018b. You can view more information about it here ( and here ( Let me know if you have any questions about this. Thanks, JColvin
  24. jpeyron

    Unable to boot embedded linux on Zynq Zybo

    He @bkzshabbaz, Here is a forum thread that discusses the bootargs for the zybo. Here is an instructable that might be helpful as well. thank you, Jon
  25. jpeyron


    Hi @Mike Boich, Here is the Petalinux Support for Digilent Boards page. Here is the readme for the Zybo-z7-20 petalinux project. Here is the linux base design for the Zybo-z7-20. Make sure to follow the readme's suggestion in regards to manually inserting a BUFG on FCLK1 using a util_ds_buf IP core. When you download the zip of the base linux project you will also need to download the vivado library here and insert the contents in the folder here: "repo/vivado-library/ ". I would suggest to start fresh with an unzipped base linux project. thank you, Jon
  26. vicentiu

    CoraZ7s custom bit file, usbhid: USB HID core driver

    You need to run the script proj/create_project.tcl from within Vivado to create the project files. We've noted to add a readme file to this repo. thanks
  27. zygot

    Nexys Video

    Xilinx tools definitely take [expected] internal operating temperatures into account when calculating timing analyses. Their tools don't make this obvious. For anyone wanting to do a lot of FPGA design I suggest downloading a free version of Quartus from Intel. Intel (ALTERA) provides a much better reporting of expected timing due to [expected] temperature. Reading Quartus reports for an FPGA board demo will be at least instuctive to those who's experience is limited to Xilinx tools. The tools, of course, don't have a way to know how a particular board will contribute to the difference between [exected] and actual junction temperatures. I can tell you that it isn't necessarily the same throughout the entire device depending on what IO bank is driving a particular external device. I you are using your Nexys Video in the lab without driving a lot of outputs on all of the PMODs and FMC connector you (probably) don't have to worry about temperature. If you are using the FMC connector and all of the boards interfaces that might not be so. The rational for monitoring internal device temperatures becomes more important if you are trying to test new hardware interfaces that might be abusing outputs. {edited} If you are driving a few outputs into ground with maximum current constraints the XADC won't be of much use as by the time you see a reading you probably have damaged the device. It's not my intention to spread FUD, just useful information. Your question is one that I've not seen before and is a good one.
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