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  1. Today
  2. Hi I am trying to program spartan-3e(NEXYS2) using boundary scan based on Digilent Adept JTAG Interface (DJTG) Programmer’s Reference Manual. And i find a demo(xilinx_jtag_prigramming_linux.c)[1] about how to program spartan-2 in JTAG mode through a parallel port. I have rewritten a procedure refer to the demo[1] basing on Digilent Adept JTAG Interface (DJTG) Programmer’s Reference Manual and Spartan-3 Generation Configuration User Guide. But it dose't work. My question is whether there are some differences between spartan-3e and spartan-2 in JTAG programming? i can not find the document about configuration and readback of Spartan-3 and Spartan-3e in xilinx website. And how Adept programs spartan-3e in JTAG mode through USB cable? Any help will be appreciated, thank you!
  3. Invites to come

    I have a situation: half year ago I met a girl from Australia at the biggest dating sites and we got in touch. But now she invites me to come to visit her, but I've never been to Australia and dont know what to do. Ask her to visit me instead? Or to visit her but I do not know if it's a good idea? Tell me how to get out of the situation
  4. Anxiety

    I am an owner of a small business. I have many business trips due to work. I have recently met a girl on one of the dating sites and we have been meeting for a few months now. But whenI am off on the business trip, I'm very worried because she's left alone. How can I calm down and do not worry? Any comments will be helpful.
  5. Dating sites

    I want to get acquainted with a girl for a long time, but I do not know how to do this. I even tried to visit the dating site https://deepinlove.date/, but how to invite her on adate is a real problem. Tell me how to overcome the fear? Give good advice.
  6. Pcam 5C with dynamic focum

    Hi! According PCAM 5C reference manual: "If you are interested in obtaining a liquid lens capable version of the Pcam 5C, please contact Digilent using the Digilent Forum. " What should I do to order such kind PCAM 5C ? Thanks a lot!
  7. Yesterday
  8. Pmod IOXP: I/O Expansion Module

    Can I implement the ADC and DAC at the same time using Pmod IOXP: I/O Expansion Module on Virtex ultra scale+ FPGA? Thanks in advance.
  9. XADC conversion rate

    You want to use an MMCM or clocking IP core of some form in order to get a 104MHz clock that can be used to get 1000MSPS vs 25/26ths that rate.
  10. Waveforms 3.7.5 and oversampling

    Also i have noticed, that when #2 configuration is selected (more samples for the scope), in Sample drop-down menu only 16k samples option is available.
  11. Multiple AD2 devices in single Waveforms instance

    Hi @attila, In the above example I have not changed time base. I run it several times (Single) and first 5 acquisitions were OK. Than above happened. I will test these scripts further in nearby future.
  12. Waveforms 3.7.5 and oversampling

    Hi, I have updated WF application and I see that oversampling is performing worse than in previous version. 3.7.5: 3.6.8: Also for higher oversampling values there are visible some levels in the waveform: 3.6.8: Is this physical effect (ex. sample & hold), or a bug? Best wishes for everyone. PR
  13. XADC conversion rate

    1. all part of this, I do not know what equation IP CORE applies, I do not know why it decreases the sampling frequency
  14. ZYBO SDSoc 2017.4 support

    Hi! Since latest SDSoc release Xilinx will not support Zybo board. https://www.xilinx.com/support/documentation/sw_manuals/xilinx2017_4/ug1238-sdx-rnil.pdf page 9 : "Zybo and microzed platforms are now available only from the board vendors." Will you support this board (Zybo) or new one (Zybo Z7) in 2017.4 and upcoming versions of SDSoc ? When corresponding BSP packages became available ? Thansk a lot!
  15. Cannot connect to lwIP echo server on PYNQ

    Hi, I am trying to run the lwIP echo server application project template from the Xilinx SDK on my PYNQ board. I have followed this tutorial for the Zybo FPGA board (which also contains the ZYNQ): https://reference.digilentinc.com/learn/programmable-logic/tutorials/zybo-getting-started-with-zynq-server/start Everything works fine until the very last step, when I come to connect to the echo server using telnet. The PYNQ is telling my via serial comms that Board IP: 192.168.1.10 Netmask : 255.255.255.0 Gateway : 192.168.1.1 TCP echo server started @ port 7 So I followed the instructions in the above link to set up the ethernet connection on my Windows PC with the static IP address 192.168.1.11 using the given netmask. Unfortunately when I come to connect via telnet using Putty, it tells me that the host is unreachable. I have also tried using my Ubuntu PC but I get the same problem. I have tried debugging the echo server in the Xilinx SDK by setting a break point in the recv_callback() function, but it never seems to reach that part of the code, indicating that no packets are ever received from my PC. Does anybody have any idea what I could be doing wrong please? Thanks!
  16. Vivado License on Cmod A7: Breadboardable Artix-7 FPGA Module

    If you have doubts about your current license, it might be the easiest route to simply build a test design and see what happens. Personally, I suspect that tool vendors make a great deal of money from uneducated users and are reluctant to change that. This as constraint file set_property -dict {PACKAGE_PIN L17 IOSTANDARD LVCMOS33} [get_ports CLK12] set_property -dict {PACKAGE_PIN A17 IOSTANDARD LVCMOS33} [get_ports {LED}] and module top(input wire CLK12, output reg LED); always @(posedge CLK12) LED <= LED + 1'b1; endmodule should do the trick. Choose xc7a35tcpg236-1 under Vivado "project settings".
  17. ARTY A7 Boad AD7091R

    oh OK Thanks, Saeed
  18. XADC conversion rate

    I think the ADC requires 26 cycles per conversion, kind of an odd number. If you feed it an input clock of 104 MHz, it will give exactly 1 MSPS (according to my XADC wizard on Artix 7) with an internal clock divider of 4 (26*4=104). BTW, your register printout seems to show a clock divider of 25 (0x19?? in register 42), so I guess this will run much slower?
  19. arty xc7S50 vivado support win 8.1

    2016.4 claims to support win 8.1 and it does install and operate without crashing.on the install it has a check box for Spartan 7 devices which I checked to install when I launched the program I found it has A7 devices but it does not have any S7 devices to select even thou I selected the install Spartan 7 devices. Is there away to add them so that they will be listed and selectable? Thank you DC
  20. Vivado License on Cmod A7: Breadboardable Artix-7 FPGA Module

    @CleverDigitalGuy, I wasn't intending to berate you. You are not alone and there are frequent posts to the wrong forum. @JColvin Is there any easy way direct newcomers to the correct forum or for non-administrators to mark posts that should be somewhere else to assist in organization? I'm going to stop commenting. Finding pertinent answers to user's questions isn't easy; especially for older posts.
  21. XADC conversion rate

    Hi @cristian_zanetti, I am not seeing anything specifically about your configuration that would cause this. Have you tried changing your averaging configuration? I would alter the xadc configurations until i found the setting that is affecting the performance. I would also look at this demo as a basic reference for setup. thank you, Jon
  22. Hello @Dave S., I have moved your question to a more appropriate section of the Forum. There is also a tutorial on the Protocol Analyzer here as well as some built in documentation available in WaveForms itself under Help>Browse, and then under Protocol on the left hand side on the web page that is brought up. Let me know if you have any other questions. Thanks, JColvin
  23. Last week
  24. Can someone please point me to a manual for the Protocol section of the Waveforms software? I would like to send an I2C command over a bus but I am getting an I2C bus error. Verify the signal pull-ups error. I do have the appropriate pullup resistor however. Also, it's not clear how the interface works. A manual would be useful. Thanks, Dave
  25. arty xc7S50 vivado support win 8.1

    Hi @DigitalConfig, Not in terms of the software side of things unfortunately. Depending on when you purchased the board (in conjunction with our Return Policy) you may be able to return the board in exchange for a different one. You will need to contact our sales department by emailing sales at digilentinc dot com for more details on this. Thank you, JColvin
  26. Hi @Ragbagger, Unfortunately the Digilent engineers here on the Forum don't have any experience with the Cypress PSOC boards, so we won't be able to offer much advice in terms of how to program it, but with the general SD card library examples that come with the Arduino IDE, you should be able to use just the top 6 pins of the Pmod without any issue. You should still use SPI though with the Pmod SD though. Let me know if you have any questions. Thanks, JColvin
  27. arty xc7S50 vivado support win 8.1

    yes I understand that now. I do not believe i have the option to upgrade nor downgrade the OS at this time. I have come to appreciate xilinx FPGAs as the best available on the market and Digilent Boards are the best boards Ive found to implement these FPGAs. can anything be done please?
  28. XADC conversion rate

    VHDL
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