/include/ "system-conf.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/media/xilinx-vip.h>

/{
xlnk {
compatible = "xlnx,xlnk-1.0";
};
};

/{

    model = "Zynq Zed Development Board";
    compatible = "xlnx,zynq-zed", "xlnx,zynq-7000";
   
     usb_phy0: phy0@e0002000 {
        compatible = "ulpi-phy";
        #phy-cells = <0>;
        reg = <0xe0002000 0x1000>;
        view-port = <0x0170>;
        drv-vbus;
    };
};


&v_tc_0 {
    compatible = "xlnx,bridge-v-tc-6.1";
    xlnx,pixels-per-clock = <1>;
};


&usb0 {	
	dr_mode = "host";
	usb-phy = <&usb_phy0>;
};

&sdhci0 {
	u-boot,dm-pre-reloc;
};

&uart1 {
	u-boot,dm-pre-reloc;
};

&qspi {
	u-boot,dm-pre-reloc;
};


&flash0 {
	compatible = "micron,m25p80", "s25fl128s", "spi-flash";
};



&mipi_csi2_rx_subsyst_0 {
	
	compatible = "xlnx,mipi-csi2-rx-subsystem-4.0", "xlnx,mipi-csi2-rx-subsystem-4.0";        
	reg = <0x43c00000 0x10000>;
	xlnx,max-lanes = <0x02>;
	xlnx,csi-en-activelanes = "true";
	xlnx,vc = <0x4>;
	xlnx,csi-pxl-format = "RAW8";
	xlnx,vfb ;
	xlnx,ppc = <1>;
	xlnx,axis-tdata-width = <32>;

	clock-names = "lite_aclk", "dphy_clk_200M", "video_aclk";
	clocks = <&misc_clk_0>, <&misc_clk_1>, <&misc_clk_0>;
			
        csiss_ports: ports {
        #address-cells = <1>;
        #size-cells = <0>;
        csiss_port0: port@0 {
            reg = <0>;
	    xlnx,cfa-pattern = "rggb";
            xlnx,video-format = <12>;
            xlnx,video-width = <8>;
            mipi_csi2_rx_0_to_demosaic_0: endpoint {
                remote-endpoint = <&demosaic_0_from_mipi_csi2_rx_0>;
            };
        };
        csiss_port1: port@1 {
            reg = <1>;
	    xlnx,cfa-pattern = "rggb";
            xlnx,video-format = <12>;
            xlnx,video-width = <8>;
            csiss_in: endpoint {
		data-lanes = <1 2>;
	        remote-endpoint = <&ov5640_to_mipi_csi2>;
            };
        };
    };
};

&v_demosaic_0 {
    reset-gpios = <&gpio0 57 GPIO_ACTIVE_LOW>;    
    compatible = "xlnx,v-demosaic";  
    reg = <0x43c10000 0x10000>; 
    clocks = <&misc_clk_0>;
    xlnx,max-height = <800>;
    xlnx,max-width = <800>;
			
    ports {
        #address-cells = <1>;
        #size-cells = <0>;
        port@0 {
            reg = <0>;
	    xlnx,cfa-pattern = "rggb";
            xlnx,video-width = <8>;
            demosaic_0_from_mipi_csi2_rx_0: endpoint {
                remote-endpoint = <&mipi_csi2_rx_0_to_demosaic_0>;
            };
        };
	port@1 {
            reg = <1>;
	    xlnx,cfa-pattern = "rggb";
            xlnx,video-width = <8>;

            demosaic_0_to_fb: endpoint {
                remote-endpoint = <&vcap_in>;
            };
        };
       
    };
};

/ {
    misc_clk_0 {
        #clock-cells = <0>;
        compatible = "fixed-clock";
        clock-frequency = <15000000>;
    };
    cam_reg_1v8: regulator-1v8 {
		compatible = "regulator-fixed";
		regulator-name = "1v8";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;
                startup-delay-us = <50000>;
		enable-active-high;
	};
	cam_reg_2v8: regulator-1v8 {
		compatible = "regulator-fixed";
		regulator-name = "2v8";
		regulator-min-microvolt = <2800000>;
		regulator-max-microvolt = <2800000>;
		
	};
	cam_reg_1v5: regulator-1v8 {
		compatible = "regulator-fixed";
		regulator-name = "1v5";
		regulator-min-microvolt = <1500000>;
		regulator-max-microvolt = <1500000>;
	};	
  
};

&i2c0 {
    clock-frequency = <100000>;
    status = "okay";
    i2c-switch@70{ /* U3 on FMC */
        compatible = "nxp,pca9546";
        #address-cells = <1>;
        #size-cells = <0>;
        reg = <0x70>;
        i2csw_0: i2c@0 { /* cam 1 */
            #address-cells = <1>;
            #size-cells = <0>;
            reg = <0>;
            /* I2C0 */
             };
        i2csw_1: i2c@1 { /* cam 2 */
            #address-cells = <1>;
            #size-cells = <0>;
            reg = <1>;
            /* I2C1 */
            };
        i2csw_2: i2c@2 { /* cam 3*/
            #address-cells = <1>;
            #size-cells = <0>;
            reg = <2>;
             /* I2C2 */
            };
        i2csw_3: i2c@3 { /* cam 4 */
            #address-cells = <1>;
            #size-cells = <0>;
            reg = <3>;
            /* I2C3 */
            };
    };
};

&i2csw_0 {
		ov5640: camera@3c {
        compatible = "ovti,ov5640";
        reg = <0x3c>;
        clocks = <&misc_clk_0 >;
        clock-names = "xclk";
        vdddo-supply = <&cam_reg_1v8>;
	vdda-supply = <&cam_reg_2v8>;
	vddd-supply = <&cam_reg_1v5>;
        
        port {
	        ov5640_to_mipi_csi2: endpoint {
                remote-endpoint = <&csiss_in>;
                clock-lanes = <0>;
                data-lanes = <1 2>;
            };
        };
    };
};



&v_frmbuf_wr_0 {
	compatible = "xlnx,axi-frmbuf-wr-v2.1";	
	reset-gpios = <&gpio0 54 GPIO_ACTIVE_LOW>;
};

&v_frmbuf_rd_0 {
	compatible = "xlnx,axi-frmbuf-rd-v2.1";
	reset-gpios = <&gpio0 55 GPIO_ACTIVE_LOW>;
	
};

&csiss_in {
    data-lanes = <1 2>;
    remote-endpoint = <&ov5640_to_mipi_csi2>;
};

&csiss_port0 {
	xlnx,video-format = <XVIP_VF_YUV_422>;
};

&csiss_port1 {
	xlnx,video-format = <XVIP_VF_YUV_422>;
};

&amba_pl {
    video_in: video_cap {
        compatible = "xlnx,video";
	 
        dmas = <&v_frmbuf_wr_0 0>;
       dma-names = "port0";

       ports {
            #address-cells = <1>;
            #size-cells = <0>;

             port@0 {
                reg = <0>;
                direction = "input";
                vcap_in: endpoint {
                    remote-endpoint = <&demosaic_0_to_fb>;
                };
            };            
        };
    };
};