create_clock -period 12.500 -name clk_1 -waveform {0.000 6.250} [get_ports sysclk_in]
set_property CLOCK_DEDICATED_ROUTE FALSE [get_nets sysclk_in]
set_property PACKAGE_PIN AP37 [get_ports sysclk_in]
set_property IOSTANDARD LVCMOS18 [get_ports sysclk_in]

#create_clock -period 9.412 -name clk_p -waveform {0.000 4.706} [get_ports Q3_CLK1_GTREFCLK_PAD_P_IN_rx]
create_clock -period 9.412 -name clk_p -waveform {0.000 4.706} [get_ports Q3_CLK1_GTREFCLK_PAD_P_IN]
#set_property CLOCK_DEDICATED_ROUTE FALSE [get_nets Q3_CLK1_GTREFCLK_PAD_N_IN]
#set_property CLOCK_DEDICATED_ROUTE FALSE [get_nets Q3_CLK1_GTREFCLK_PAD_P_IN]
set_property LOC AH7 [get_ports Q3_CLK1_GTREFCLK_PAD_N_IN]
set_property LOC AH8 [get_ports Q3_CLK1_GTREFCLK_PAD_P_IN]
set_property PACKAGE_PIN AL1 [get_ports out_n]
set_property PACKAGE_PIN AL2 [get_ports out_p]
set_property PACKAGE_PIN AL5 [get_ports in_n]
set_property PACKAGE_PIN AL6 [get_ports in_p]


#set_property LOC GTHE2_CHANNEL_X1Y15 [get_cells gtwizard_tx_support_i/U0/gtwizard_tx_init_i/gtwizard_tx_i/gt0_gtwizard_tx_i/gthe2_i]
#set_property LOC GTHE2_CHANNEL_X1Y14 [get_cells gtwizard_rx_support_i/U0/gtwizard_rx_init_i/gtwizard_rx_i/gt0_gtwizard_rx_i/gthe2_i/gthrxn_in]
#set_property LOC GTHE2_CHANNEL_X1Y15 [get_cells gtwizard_tx/U0/gtwizard_tx_init_i/gtwizard_tx_i/gt0_gtwizard_tx_i/gthe2_i/gthrxn_in]


#set_property CLOCK_DEDICATED_ROUTE FALSE [get_nets u3/U0/common0_i/GT0_QPLLOUTCLK_OUT]
#set_property CLOCK_DEDICATED_ROUTE FALSE [get_nets u3/U0/common0_i/GT0_QPLLOUTREFCLK_OUT]
#set_property CLOCK_DEDICATED_ROUTE FALSE [get_nets u1/U0/common0_i/GT0_QPLLOUTCLK_OUT]
#set_property CLOCK_DEDICATED_ROUTE FALSE [get_nets u1/U0/common0_i/GT0_QPLLOUTREFCLK_OUT]




set_property PACKAGE_PIN AU39 [get_ports {gt0_rxdata_in[31]}]
set_property IOSTANDARD LVCMOS18 [get_ports {gt0_rxdata_in[31]}]
set_property PACKAGE_PIN AP42 [get_ports {gt0_rxdata_in[30]}]
set_property IOSTANDARD LVCMOS18 [get_ports {gt0_rxdata_in[30]}]
set_property PACKAGE_PIN AP41 [get_ports {gt0_rxdata_in[29]}]
set_property IOSTANDARD LVCMOS18 [get_ports {gt0_rxdata_in[29]}]
set_property PACKAGE_PIN AR35 [get_ports {gt0_rxdata_in[28]}]
set_property IOSTANDARD LVCMOS18 [get_ports {gt0_rxdata_in[28]}]
set_property PACKAGE_PIN AT37 [get_ports {gt0_rxdata_in[27]}]
set_property IOSTANDARD LVCMOS18 [get_ports {gt0_rxdata_in[27]}]
set_property PACKAGE_PIN AR37 [get_ports {gt0_rxdata_in[26]}]
set_property IOSTANDARD LVCMOS18 [get_ports {gt0_rxdata_in[26]}]
set_property PACKAGE_PIN AN39 [get_ports {gt0_rxdata_in[25]}]
set_property IOSTANDARD LVCMOS18 [get_ports {gt0_rxdata_in[25]}]
set_property PACKAGE_PIN AM39 [get_ports {gt0_rxdata_in[24]}]
set_property IOSTANDARD LVCMOS18 [get_ports {gt0_rxdata_in[24]}]
set_property PACKAGE_PIN E35 [get_ports {gt0_rxdata_in[23]}]
set_property IOSTANDARD LVCMOS18 [get_ports {gt0_rxdata_in[23]}]
set_property PACKAGE_PIN E34 [get_ports {gt0_rxdata_in[22]}]
set_property IOSTANDARD LVCMOS18 [get_ports {gt0_rxdata_in[22]}]
set_property PACKAGE_PIN D36 [get_ports {gt0_rxdata_in[21]}]
set_property IOSTANDARD LVCMOS18 [get_ports {gt0_rxdata_in[21]}]
set_property PACKAGE_PIN D35 [get_ports {gt0_rxdata_in[20]}]
set_property IOSTANDARD LVCMOS18 [get_ports {gt0_rxdata_in[20]}]
set_property PACKAGE_PIN D33 [get_ports {gt0_rxdata_in[19]}]
set_property IOSTANDARD LVCMOS18 [get_ports {gt0_rxdata_in[19]}]
set_property PACKAGE_PIN E33 [get_ports {gt0_rxdata_in[18]}]
set_property IOSTANDARD LVCMOS18 [get_ports {gt0_rxdata_in[18]}]
set_property PACKAGE_PIN G33 [get_ports {gt0_rxdata_in[17]}]
set_property IOSTANDARD LVCMOS18 [get_ports {gt0_rxdata_in[17]}]
set_property PACKAGE_PIN H33 [get_ports {gt0_rxdata_in[16]}]
set_property IOSTANDARD LVCMOS18 [get_ports {gt0_rxdata_in[16]}]
set_property PACKAGE_PIN F35 [get_ports {gt0_rxdata_in[15]}]
set_property IOSTANDARD LVCMOS18 [get_ports {gt0_rxdata_in[15]}]
set_property PACKAGE_PIN F34 [get_ports {gt0_rxdata_in[14]}]
set_property IOSTANDARD LVCMOS18 [get_ports {gt0_rxdata_in[14]}]
set_property PACKAGE_PIN F32 [get_ports {gt0_rxdata_in[13]}]
set_property IOSTANDARD LVCMOS18 [get_ports {gt0_rxdata_in[13]}]
set_property PACKAGE_PIN G32 [get_ports {gt0_rxdata_in[12]}]
set_property IOSTANDARD LVCMOS18 [get_ports {gt0_rxdata_in[12]}]
set_property PACKAGE_PIN G37 [get_ports {gt0_rxdata_in[11]}]
set_property IOSTANDARD LVCMOS18 [get_ports {gt0_rxdata_in[11]}]
set_property PACKAGE_PIN G36 [get_ports {gt0_rxdata_in[10]}]
set_property IOSTANDARD LVCMOS18 [get_ports {gt0_rxdata_in[10]}]
set_property PACKAGE_PIN C39 [get_ports {gt0_rxdata_in[9]}]
set_property IOSTANDARD LVCMOS18 [get_ports {gt0_rxdata_in[9]}]
set_property PACKAGE_PIN C38 [get_ports {gt0_rxdata_in[8]}]
set_property IOSTANDARD LVCMOS18 [get_ports {gt0_rxdata_in[8]}]
set_property PACKAGE_PIN H36 [get_ports {gt0_rxdata_in[7]}]
set_property IOSTANDARD LVCMOS18 [get_ports {gt0_rxdata_in[7]}]
set_property PACKAGE_PIN J36 [get_ports {gt0_rxdata_in[6]}]
set_property IOSTANDARD LVCMOS18 [get_ports {gt0_rxdata_in[6]}]
set_property PACKAGE_PIN D32 [get_ports {gt0_rxdata_in[5]}]
set_property IOSTANDARD LVCMOS18 [get_ports {gt0_rxdata_in[5]}]
set_property PACKAGE_PIN E32 [get_ports {gt0_rxdata_in[4]}]
set_property IOSTANDARD LVCMOS18 [get_ports {gt0_rxdata_in[4]}]
set_property PACKAGE_PIN G38 [get_ports {gt0_rxdata_in[3]}]
set_property IOSTANDARD LVCMOS18 [get_ports {gt0_rxdata_in[3]}]
set_property PACKAGE_PIN H38 [get_ports {gt0_rxdata_in[2]}]
set_property IOSTANDARD LVCMOS18 [get_ports {gt0_rxdata_in[2]}]
set_property PACKAGE_PIN J38 [get_ports {gt0_rxdata_in[1]}]
set_property IOSTANDARD LVCMOS18 [get_ports {gt0_rxdata_in[1]}]
set_property PACKAGE_PIN J37 [get_ports {gt0_rxdata_in[0]}]
set_property IOSTANDARD LVCMOS18 [get_ports {gt0_rxdata_in[0]}]